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WebEORS ip, a4, a2, ASR #32 ; ip bit 31 = sign of result ; ip bit 30 = sign of a2 RSBCS a2, a2, #0 ; central part is identical code to udiv ; (without MOV a4, #0 which comes for free as part of signed ; entry sequence) MOVS a3, a1 BEQ divide_by_zero just_l ; justification stage shifts 1 bit at a time CMP a3, a2, LSR #1 WebMar 29, 2016 · Test Prep Book's HESI A2 Study Guide: Prep Book & Practice Test Questions for the HESI Admission Assessment Exam Developed by Test Prep Books for test takers trying to achieve a passing score on the HESI A2 exam, this comprehensive study guide includes: •Quick Overview •Test-Taking Strategies •Introduction •Mathematics •Reading … WebJan 10, 2024 · 1 Answer. Sorted by: 8. TST R1, R2 computes the bitwise AND of R1 and R2 and then discards the result while CMP R1, R2 subtracts the two. TST is mainly useful on … flaherty kevin